Date of Award

8-20-2000

Degree Type

Thesis

Degree Name

Doctor of Philosophy (PhD)

Department

Engineering Physics

Supervisor

Paul E. Jessop

Abstract

This thesis details the development of enabling technologies required for inexpensive, monolithic integration of Si-based wavelength division multiplexing (WDM) components and photodetectors. The work involves the design and fabrication of arrayed waveguide grating demultiplexers in silicon-on-insulator (SOI), the development of advanced SiGe photodetectors capable of photodetection at 1.55 μm wavelengths, and the development of a low cost fabrication technique that enables the high volume production of Si-based photonic components. Arrayed waveguide grating (AWG) demultiplexers were designed and fabricated in SOI. The fabrication of AWGs in SOI has been reported in the literature, however there are a number of design issues specific to the SOI material system that can have a large effect on device performance and design, and have not been theoretically examined in earlier work. The SOI AWGs presented in this thesis are the smallest devices of this type reported, and they exhibit performance acceptable for commercial applications. The SiGe photodetectors reported in the literature exhibit extremely low responsivities at wavelengths near 1.55 μm. We present the first use of three dimensional growth modes to enhance the photoresponse of SiGe at 1.55 μm wavelengths. Metal semiconductor-metal (MSM) photodetectors were fabricated using this undulating quantum well structure, and demonstrate the highest responsivities yet reported for a SiGe-based photodetector at 1.55 μm. These detectors were monolithically integrated with low-loss SOI waveguides, enabling integration with nearly any Si-based passive WDM component. The pursuit of inexpensive Si-based photonic components also requires the development of new manufacturing techniques that are more suitable for high volume production. This thesis presents the development of a low cost fabrication technique based on the local oxidation of silicon (LOCOS), a standard processing technique used for Si integrated circuits. This process is developed for both SiGe and SOI waveguides, but is shown to be commercially suitable only for SOI waveguide devices. The technique allows nearly any Si microelectronics fabrication facility to begin manufacturing optical components with minimal change in processing equipment or techniques. These enabling technologies provide the critical elements for inexpensive, monolithic integration in a Si-based system.

Files over 3MB may be slow to open. For best results, right-click and select "save as..."

Share

COinS